Pin | Name | Direction | Description |
---|
1 | +5v | Output | Power, 300mA |
2 | /CNTRL2 | Input | Game adapter control signal |
3 | +12v | Output | Power, 100mA |
4 | -12v | Output | Power, 50mA |
5 | /CNTRL1 | Input | Game adapter control signal |
6 | /WAIT | Input | Z80 WAIT |
7 | /RST | Input | Z80 RST |
8 | CPU CLK | Output | Buffered 3.58MHz system clock |
9 | A15 | Output | Buffered Address bus |
10 | A14 | Output | " |
11 | A13 | Output | " |
12 | A12 | Output | " |
13 | A11 | Output | " |
14 | A10 | Output | " |
15 | A9 | Output | " |
16 | A8 | Output | " |
17 | A7 | Output | " |
18 | A6 | Output | " |
19 | A5 | Output | " |
20 | A4 | Output | " |
21 | A3 | Output | " |
22 | A2 | Output | " |
23 | A1 | Output | " |
24 | A0 | Output | " |
25 | /RFSH | Output | RAM expansion refresh |
26 | /EXCSR | Input | Video-CPU write select |
27 | /M1 | Output | Z80 M1 |
28 | /EXCSW | Input | CPU-Video write select |
29 | /WR | Output | Z80 WR |
30 | /MREQ | Output | Z80 MREQ |
31 | /IORQ | Output | Z80 IORQ |
32 | /RD | Output | Z80 RD |
33 | D0 | Input/Output | Buffered Data Bus |
34 | D1 | Input/Output | " |
35 | D2 | Input/Output | " |
36 | D3 | Input/Output | " |
37 | D4 | Input/Output | " |
38 | D5 | Input/Output | " |
39 | D6 | Input/Output | " |
40 | D7 | Input/Output | " |
41 | CSOUND | Input | Audio input signal |
42 | /INT | Input | Z80 INT |
43 | /RAMDIS | Input | Disable user RAM |
44 | /ROMDIS | Input | Disable basic ROM |
45 | /BK32 | Output | Enable bank 32 Memory (8000-ffff) |
46 | /BK31 | Output | Enable bank 31 Memory (0000-7FFF) |
47 | /BK22 | Output | Enable bank 22 Memory (8000-FFFF) |
48 | /BK21 | Output | Enable bank 21 Memory (0000-7FFF) |
49 | GND | --- | System Ground |
50 | GND | --- | System Ground |